you need to have a system clock that is equal or faster than the IO clock. Or the input clock must be a gated version of a fixed rate clock and transitions must not be allowed to stop for long periods of time.
I don't know how you got the data bits, but I'll assume the input/output relationship makes sense and you can implement that part without issues. It is usually more helpful to have data listed as a,b,c,d,e,f ... as then it is clear if there is some permutation of bits.