Separate grounds for Analog and Digital blocks

[calculus_cuthbert]

analog and digital ground isolation

Hi,

I am designing an LC VCO which is followed by a frequency divider. Is it necessary to have separate grounds for analog and digital blocks?

If it is then how should i do it in the layout without using a triple well process? The substrate is common to the analog and digital blocks.. so is it possible to have separate grounds without a triple well process??

Thanks.

 

[sanredrose]

guard ring analog digital

Hi,

I am designing an LC VCO which is followed by a frequency divider. Is it necessary to have separate grounds for analog and digital blocks?

If it is then how should i do it in the layout without using a triple well process? The substrate is common to the analog and digital blocks.. so is it possible to have separate grounds without a triple well process??

Thanks.

If you are planning to submit a individual test structure for you VCO then you can afford to have separate digital and analog grounds. The reason why we try to have a separate digital ground is to ensure the switching noise from the digital cells don't travel into the analog blocks.

Its possible to a prepare separate isolation / ground in non - triple well process. Depending on what you need i can add more snapshots of how to do them.

 

[Pat_Mustard]

analog digital ground layer

Depends on the process, however if you have a deep trench option then I would recomend placing a guardring around your digital section tied to digital GND, then drawing a ring of deep trench isolation (as opposed to shallow trench isolation [STI]), then another guardring around the outside tied to analog GND. It should be noted that the larger the ring of deep trench isolation the less effective it is, so if your digital is large and analog relatively small then draw the guardring / dti / guardring structure around the analog with the GNDs swapped.

You may have to look up your process manual for how to get these to pass LVS, there is probably a substrate naming layer you can use.

 

[Adamar]

noise substrate connection separate

Hi!
I'm use Calibre for verification, and i'm interested is there something like JoinNets in Calibre as it is in the Assura?
tripple layers and add new GR, is not actual, because i can't modify layout...

several mounth ago we had problem with A&D grounds, but we've used Assura, and by using joinnets in schematic we virtualy have connected this nets, and in layout we've connected it by Metal layer, and as resutl Lvs was correct, RCX ran, and SD ADC have been done))

 

[saro_k_82]

analog and digital grounds layout

In addition to all the advices, you should use CML flops for the high frequency dividers. They are resistant to substrate noise and introduce little substrate noise. You would not require two separate grounds then. This is just handling the problem at the root level.

 

[calculus_cuthbert]

create two separate grounds

Hi all,

Thank you for your suggestions.

I am using a pre designed JK flip flop to design a frequency divider. So I can't change the flip flop. How do I proceed then?

How do I minimize substrate noise? I don't have an option to use a triple well process.

I don't know the technique of putting a guard ring. could someone please help me? what does a guard ring do? how does it lower substrate noise? and how and where should i put the guard ring..

Thank you

 

[deepak242003]

how to separate grounds

Hi!
I'm use Calibre for verification, and i'm interested is there something like JoinNets in Calibre as it is in the Assura?
tripple layers and add new GR, is not actual, because i can't modify layout...

several mounth ago we had problem with A&D grounds, but we've used Assura, and by using joinnets in schematic we virtualy have connected this nets, and in layout we've connected it by Metal layer, and as resutl Lvs was correct, RCX ran, and SD ADC have been done))

you can use -vcol in calibre verification that uses virtual net connection. As I am not aware what exactly your problems is I could nt suggest more...
what u can do is give the net names your want to connect follwoed by : and then during verification (lvs) ,add -vcol.. this willl resolve the issue

Added after 3 minutes:

nice explanation Pat......
calculas your can go wiht the way suggested by Pat....

Jus surround your digital are wiht well guard ring tied to appropriate potential......and your can seperate analog and digital ground

 

[calculus_cuthbert]

use of digital guard ring and analog guard ring

thank you deepak..

could you please explain how guard rings help isolate the grounds??

Also should I out ntap guard rings or ptap guard rings around the digital block??

 

[climber73]

digital block guardring

In calibre, you can select CONNECT NET BY NAME from LVS OPTION.

Bye bye

 

[deepak242003]

separate grounds

thank you deepak..

could you please explain how guard rings help isolate the grounds??

Also should I out ntap guard rings or ptap guard rings around the digital block??

Hi calculus,

It could be explained like this:

consider you are in the river and put tub and inside that there is sth..

Your guardring is that tub boundary and the mateirial inside tub is isolated from river......


I hope you got the point..