nesta
Junior Member level 2
Hi VhdlExperts,
I have implemented a design in simulator and it works perfectly fine, however when i synthesize
in fpga i dont see any output. So im not sure how to debug this black box. I have used the
led method but its very difficult for me to read all outputs just with leds. so i have
resorted on using a uart to send the debug messages from fpga to Pc connected via hyperterminal.
Now i m stuck at how to send my std_logic_vector outputs on uart, so that i can read on the pc to verify the values.
Do i need to convert the std_logic_vector to ascii and then transmit.
for example if i want to send a std vector "001001" from fpga to the PC hyperterminal how do i do it:
I have implemented a design in simulator and it works perfectly fine, however when i synthesize
in fpga i dont see any output. So im not sure how to debug this black box. I have used the
led method but its very difficult for me to read all outputs just with leds. so i have
resorted on using a uart to send the debug messages from fpga to Pc connected via hyperterminal.
Now i m stuck at how to send my std_logic_vector outputs on uart, so that i can read on the pc to verify the values.
Do i need to convert the std_logic_vector to ascii and then transmit.
for example if i want to send a std vector "001001" from fpga to the PC hyperterminal how do i do it: