I have written a code for an ALU in bluespec system verilog. burnt the program in the FPGA spartan 6. now i want to make changes to the code such that it receives its input data from the UART bridge on the FPGA. i dont know what changes to make in my bluespec code. can someone help me?
You are best qualified to modify code you have written (which we don't have) to add functionality to your design.
My guess is you are a software programmer, that believed the marketing hype about how easy it is to design with _______ (fill in the blank) at a higher level of abstraction.
Well the design you are looking for will consist of.
1. a UART (serial on one side, parallel data on the other)
2. take parallel data from UART and reformat it (optional, if required)
3. input data to ALU, through some interface you design that takes UART parallel data and turns it into ALU inputs
Yup, that's pretty much also how I read that post. Either you'll have to add an uart module yourself, or that bluespec software has some pointey clickey capability to add an uart for you.