Sending 3.3V to temperature sensor on separate board

[I14R10]

I designed a weather station. It will have main board with electronics for everything, and 4 wires that go to one small board with only temperature sensor. Wires are 3.3V, GND, SCL, SDA. Yes, I know I2C wasn't supposed to be used between two boards, and that it's only for a short distances. Yes, I will use it only for 20-ish cm.

But disregarding I2C thing, how stupid is it to send 3.3V with wires, from main board's voltage regulator to the sensor 20-30cm away? The sensor has a small capacitor by V_in pin.

 

[danadakk]

Powering a board over that short a distance with a low current/power sensor
on it should not be too troublesome. Hopefully the board does have a bypass cap on its supply pins.

Regards, Dana,.

 

[I14R10]

The board itself doesn't have bypass caps but the chip does, usually 1uF.
Should I put larger caps on the board too?

 

[danadakk]

Good practice to put something like a .1 uF ceramic in parallel with a 10 or more uF
tantalum.

A good way of evaluating bypass effectiveness is using scope on infinite persistence,
look at target supply rail and see what pk-pk noise looks like. Let scope run for a min
or two in this mode.

Also set scope for "normal" triggering, edge, and set trig level for Vss - .5, then
after a minute or two set it to Vdd + .5. To see if you get any triggers outside supply
rail which can cause unpredictable results in a chips operation, in extreme CMOS
latchup.

Bypass cap effectiveness (technology of cap) :

Regards, Dana.

 

[andre_luis]

Knowing that you are already decided to use I2C for that, you could consider reducing the bus pull-up resistors downto the lowest allowed value in order to diminish high impedance electromagnetic interferences. In addition of course, lowering the clock frequency - let's agree, for most applications temperature do not change a lot in a short period.

 

[KlausST]

Hi,

I don't see any error/problem in OP's post.
So why worry at all?

Too high pull up resistance in combination worth high wiring capacitance may cause too slow signal rise,
Too low pull up resistance may cause echoes.

Klaus

 

[I14R10]

Good practice to put something like a .1 uF ceramic in parallel with a 10 or more uF
tantalum.

A good way of evaluating bypass effectiveness is using scope on infinite persistence,
look at target supply rail and see what pk-pk noise looks like. Let scope run for a min
or two in this mode.

Also set scope for "normal" triggering, edge, and set trig level for Vss - .5, then
after a minute or two set it to Vdd + .5. To see if you get any triggers outside supply
rail which can cause unpredictable results in a chips operation, in extreme CMOS
latchup.

Bypass cap effectiveness (technology of cap) :




Regards, Dana.

Thanks for advice, I'll add caps to my board. Hopefully it will be fine.

 

[danadakk]

This might help with the pullups :

https://www.ti.com/lit/an/slva689/slva689.pdf?ts=1590571837879

Regards, Dana.