Seeking for help on the coding for implementation of digital equalizer using FPGA

[kartini001]

HI..
i am now doing a project on the implementation of digital equalizer using FPGA. this equalizer will consist of 3 filters which are high pass filter (for treble sound), bandpass filter and low pass filter( bass sound). i had chose to use mathlab to design the filter. (FIR filter)..but the problem is that i do not how to combine these filter before convert to verilog HDL.

my question are:
am i chosing the right method? basically what should i do to get the right coding since i need to run it by using Altere DE2 board.

appreciate that anyone here can help/guides me through out this project
thanks..
kartiniabdullah001@gmail.com

 

[barry]

You can just cascade the three filters, right? Just create one module for each of the three filters, and connect the output of one to the input of the next.