Hi Cube007 ,
Have you read this pdf ?
The author tells you that Until the introduction of Virtex II, the advice
from the major SRAM FPGA vendors was that to protect against design
piracy by copying bitstream information the best approach was to
configure the FPGA before the product left the factory and
maintain the configuration in the field using a battery back up when the
main power supply to the equipment containing the FPGA
was switched off. which doesn't make sense in practical implementation.
Then he spoke about FPSLIC ; actually the FPSLIC is very specified
and you can't compare it with some families like Spartan of Xilinx ..
Again , he list a very old technique , which is encrypting the bit stream
inside the FPGA before storing it in the flash ; but he , himself, approve
that if you hacked by man in the middle your security will be broken!!
Also he spoke about Manufacturer Defined Key ; also this technique
can easly be broken if the hacker has a simple LA !
I believe that : As long as the bit stream outside the FPGA and is
downloaded when power up ; The cloning can be done whatever
you did to protect it !