annotation delay
i have to check the standard cell verilog model on the "specify" parts.
can you give me the exact timing difference between the two paths, and the detail logic of the path.
thanks
Added after 37 minutes:
i checked verilog model.
with no SDF, "specify" model are used, which is totally inaccurate.
while the SDF is extracted from the cell lib and .spef file, the cell delay is quite accurate.
so, it doesn't make any sense to compare the above two type of delay.