shlooky
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Hi there,
I am trying to write SDC contraints for given design...
Input clocks are defined by "create_clock" commands (not shown in the picture).
MUXes are covered by "set_clock_groups" commands.
Freq_div outputs should be covered by "create_generated_clock" commands.
I am not 100% sure about the pin definitions, could you guys please check it?
Am I missing something?
Any advice maybe?
Thanks in advance...
I am trying to write SDC contraints for given design...
Input clocks are defined by "create_clock" commands (not shown in the picture).
MUXes are covered by "set_clock_groups" commands.
Freq_div outputs should be covered by "create_generated_clock" commands.
I am not 100% sure about the pin definitions, could you guys please check it?
Am I missing something?
Any advice maybe?
Thanks in advance...
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