Various tools have different levels for this. For Vivado, you can get a schematic after each step of the design.
The first being elaboration, the second being synthesis, and the last being implementation. There are small differences between each of these steps as they work at different levels of abstraction.
The tools will take the RTL and first map language constructs into general blocks it knows how to implement. eg, muxes, comparators, adders, adder-trees, fsms, memories, etc... The results after implementation will show the basic elements used to construct these muxes, comparators, etc...
As you enable more synthesis and implementation optimizations, the resulting schematic will look less and less like the human-readable version you have.