SCAN chain with different edge triggering

[Siddft]

What happens when a scan chain contains mixed clock edge flip flop?

 

[maulin sheth]

Basically there are Three possibilities :
1) Mostly we try to make every scan chain working on the same clock edges...
2) if contain mixed clock edges thn we first put the all the neg edge scan cells thn all pos edge scan cells.
3) if scan chain in not possible to put all neg edge first and thn pos edge last --> we can use lock up latch for different clock edges.

 

[Siddft]

Thanks for your reply.
but what kind of error we will get when there is a mixed flops in scan chains?

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Thanks for your reply.
but what kind of error we will get when there is a mixed flops in scan chains?

 

[maulin sheth]

I dont think so...tht this creates any error...
But the loss of Controllability for shifting purpose...

 

[Siddft]

Thanks for your reply.
But what kind of error we 'll get when a scan chain contains mixed flops?

 

[maulin sheth]

We we are in shift mode thn there might be problem occur....and mostly more clock cycle are required for the shifting...
Are you asking for DRC or Error? Can you elaborate the meaning of error means particularly for this case?

 

[Siddft]

DRC errors only....!
and why neg edge flops first why not positive edge tri flops?

 

[maulin sheth]

DRC errors only....!
and why neg edge flops first why not positive edge tri flops?

Which book u refer for the DFT?
I think that you need to do analysis such like
1) First put pos edge and thn neg edge...
2) First put neg edge and thn put pos edge..

What happens in this case? Just do it with the timing diagram..so u can get the better understanding....

 

[Siddft]

Thanks a lot:smile: