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Basically there are Three possibilities :
1) Mostly we try to make every scan chain working on the same clock edges...
2) if contain mixed clock edges thn we first put the all the neg edge scan cells thn all pos edge scan cells.
3) if scan chain in not possible to put all neg edge first and thn pos edge last --> we can use lock up latch for different clock edges.
We we are in shift mode thn there might be problem occur....and mostly more clock cycle are required for the shifting...
Are you asking for DRC or Error? Can you elaborate the meaning of error means particularly for this case?