Save Analog input (at clock frquency) to Text File using Verilog-A

[Eminent.Engineer]

Hello Everyone

To use CADENCE schematic's output for my MATLAB code I need to store three parameters of CADENCE schematic i.e. Analog Input, Time and Digital Output of the system, so I want to use/write a Verilog-A code to save the data in text file so any ideas/available Verilog-A code/resources will be highly appreciated.
Thanks in advance.

 

[sdedov]

Something like this:

`include "disciplines.vams"
`include "constants.vams"

module sampler (ps, ns);
parameter real period=1 from (0:inf); // sampling period (s)
parameter real toff=0 from [0:inf); // offset time for sampling (s)
input ps, ns; voltage ps, ns; // input port
integer file;

analog begin
// Open the output file
@(initial_step) begin
file = $fopen("full_path_to_file/sampler-%m");
$strobe("file = %d.", file);
if (!file) begin
$strobe("%m: cannot open file: 'sampler-%m'.");
$finish(1);
end
end

// Sample the input
@(timer(toff, period))
$fstrobe(file, "%f\t%f", $abstime, V(ps,ns));

// Close the output file
@(final_step)
$fclose(file);
end
endmodule

 

[Eminent.Engineer]

Hello sdedov

To my understanding (I am new to Verilog-A stuff so don't know much):- as mentioned above in my system I have CLOCK signal as input so what I want to store are the Analog Input (at Clock), Clock and Corresponding Output, so in your code does $abstime will store the clock info right and Input at that Instant ?

 

[sdedov]

Hello,

First you should create symbol in Cadence. Period and toff became the parameters which you should define in your schematic. Thus you catch the sample at time defined by this two parameters. You samples voltage between ps and ns pins (i.e. for single-ended ns should be connected to 0). At output you have abstime vs voltage between ps & ns.

 

[Eminent.Engineer]

Hello sdedov

I want to store the timing instant at which the output is being stored, how to get this in Verilog-A and $abstime stores values as "0.00000001,0.00000001,0.00000001,0.00000002,0.00000002 and so on", so no difference in first three values, how to get better precision i.e. let say time is 0.00001231,0.00001232 and so on then I shouldn't get this 0.0000123 in both cases ?

Thanks in Advance

 

[sdedov]

Hello sdedov

I want to store the timing instant at which the output is being stored, how to get this in Verilog-A and $abstime stores values as "0.00000001,0.00000001,0.00000001,0.00000002,0.00000002 and so on", so no difference in first three values, how to get better precision i.e. let say time is 0.00001231,0.00001232 and so on then I shouldn't get this 0.0000123 in both cases ?

Thanks in Advance

Hi,

Try to use $realtime function, for example.
Or See "Cadence Verilog-A Language Reference" - "Examples of $strobe Formatting"

 

[Eminent.Engineer]

Hello sdedov

In Reference Manual it is mentioned that "$realtime" is not supported in Analog context. :-(

 

[sdedov]

Hello sdedov

In Reference Manual it is mentioned that "$realtime" is not supported in Analog context. :-(

Try to use %e instead of %f