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SATA interface on FPGA (what is in a packet?)

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completelyuseless

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Hello everyone,

i am to write an interface to a SATA HDD in vhdl for a virtex 5 fpga. (this handles the phy layer and the OOB signalling controll and the 8b/10b encoding)
i have generated a RIO wrapped sata 2 core.

where can i get an explanation of a byte level description of what is in the packets on a sata bus (or atleast the packets leaving and entering the LINK layer before the 8/10b encoding rather)... oddly enough this ISNT in the sata spec :'(

is it possible for me to get this information somewhere, like with ethernet packets, how wikipedia explains the byte level of the ethenet protocols

i hope this question is making sense.



thanks in advance
the useless one :(
 

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