Sample and Hold IC LF398

[syee10]

Hi,

Anyone here can tell me how to connect a Sample and Hold IC LF398 in practical so that i can get a V(out) waveform as shown in the attached file? The V(in) and V(sample) is shown in the attached file also. Please provide me a simple schematic diagram if possible. The datasheet can be found in the following links:

LF398 pdf, LF398 description, LF398 datasheets, LF398 view ::: ALLDATASHEET :::

 

[keith1200rs]

You need to invert your sample waveform. The LF398 "holds" when the sample input is low. You want it to hold when your logic signal is high.

Keith.

 

[syee10]

keith,

I think the sample waveform there should be correct. It shows the sample waveform and not the holding waveform. In fact i need to know how to connect the LF398 IC in order for me to get the output waveform. Can you help me? Thanks

 

[keith1200rs]

Look at the proper version of the **broken link removed** - first diagram on page 1.

Keith.

---------- Post added at 11:22 ---------- Previous post was at 11:18 ----------

I think you are misinterpreting the word "sample". In your diagram it really means "hold". In the LF398 datasheet "sample" really means "track".

Keith.

 

[syee10]

keith,

I already try the circuit as what you shown me. But i dun know why i cant get the output correctly. If that is the correct circuit diagram i think i will try it again.

 

[keith1200rs]

As I said, you must invert your "sample" logic signal.

Keith.

---------- Post added at 11:25 ---------- Previous post was at 11:23 ----------

By the way, where is that waveform from? It looks like an LTSpice simulation.

Keith.

 

[syee10]

keith,

Ok i understand what you mean. I will try this out in the lab again and lets see how. Thanks for your help =)

 

[syee10]

keith,

Can you explain to me what is the Logic Input Configuration in page 5 and page 6 in the datasheet talking about?

 

[keith1200rs]

Ah right. It seems the "logic reference" pin 7 and "logic input" pin 8 are partly interchangeable and allow for setting the trigger threshold and also inverting the sample/hold logic. The first diagram on page 5 shows the normal operation. The next diagram allows you to reverse the logic, but you need to supply 2.8V to pin 8 to get a 1.4V threshold on pin 7.

On page 6 the first diagram shows an increased threshold voltage. The next shows an increased threshold but with inverted logic. The next two are similar different thresholds and showing the non-inverted and inverted logic.

So, you should be able to get your circuit to work without needing an external inverter. You just need to choose whether to use pin 7 or 8 for the control input and then set the voltage on the other pin according to the diagrams.

Keith.

 

[syee10]

keith,

Thanks for your explanation. I will try to make my circuit working tomorrow.

 

[syee10]

Thanks, i got the result already