rtl integration documents

[TrickyDicky]

RTL integration can be for RTL integraion of IPs, RTL integration for SOC.

RTL integration does not mean the below

Verification,
Synthesis,
Timing Analysis,
Floorplanning.

RTL Integration may be a part of RTL generation that you are talking of.

Regards

What you describe here is what everyone else understands as "System Designer" and "HDL Coding".

 

[FvM]

Can we post this thread also in ASIC forum if anybody can answer there?

Duplicating the thread in the ASIC section is strictly forbidden by forum rules. The question was why you didn't start the thread in the right section if you know it's mostly ASIC related? Under circumstances, a thread is moved by moderators to a different section, but I think it's too late now and would cause more confusion than being helpful. Everyone involved in the discussion knows about this point.

Searching for "RTL integration" and similar keywords links to pages like this

Don't know if there are specific "guidelines" or other documents discussing this part of ASIC/FPGA design.

What you describe here is what everyone else understands as "System Designer" and "HDL Coding".

Yes. The "integration" aspect is involved in everyday's work.

 

[dpaul]

You are correct.
Can we post this thread also in ASIC forum if anybody can answer there?

Won't be of much use. From my last 3 years of 'active' experience here, most of the regular members who would reply meaningfully have already placed their opinion.

This and your past posts have given me the impression that you are likely not involved in real/industrial projects. If you are a student get an internship, else get a related job.

 

[sun_ray]

This and your past posts have given me the impression that you are likely not involved in real/industrial projects. If you are a student get an internship, else get a related job.

This above quote is not at all correct.

 

[TrickyDicky]

This above quote is not at all correct.

Maybe not - but it is the impression you give.