rtl integration documents

[sun_ray]

Can anybody please provide rtl integration guidelines document?

 

[TrickyDicky]

What kind of integration guidelines are you after?

 

[ads-ee]

Another vague open ended question, I'm thinking that the forum is being used as some sort of Turing test...well I'm on to it! :laugh:

 

[shaiko]

Sure,
Have fun.
https://www.osce.org/hcnm/96883?download=true

 

[sun_ray]

What kind of integration guidelines are you after?

RTL integration.

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Another vague open ended question, I'm thinking that the forum is being used as some sort of Turing test...well I'm on to it! :laugh:

The question was clear. Anybody who works in relevant field to which the question belongs, will promptly understand.

 

[vGoodtimes]

RTL integration.

The question was clear. Anybody who works in relevant field to which the question belongs, will promptly understand.

omg yes, please, insult people who actually could known what you can't even ask about coherently. You are super smart ++ (!!!). idk why you even ask for info from us plebs.

In all honesty, you have no clue. There are books and manufacturer info on this easily available for free or for little cost. With little effort you could either answer your question, or formulate a better one.

It is sad you have no concept that your question is actually confusing to people who actually have experience in this field because you don't actually know anything about it.

edit -- (Sometime I post negative messages. This is nothing against you as a person. Just a plea that you at least try to learn something before asking bad questions. also i don't want email reminders...)

 

[TrickyDicky]

RTL integration.

Is there some kind of echo in here?
What aspect of RTL integration?

 

[dpaul]

Well this is a post from sun_ray, so when I saw it on last Friday afternoon I choose to ignore it.
sun_ray, you have sent me a personal message. I give you the reply here. The answers of others in this thread is an indirect answer of me to your PM.

 

[sun_ray]

Is there some kind of echo in here?
What aspect of RTL integration?

This is for integration of rtls for a bigger design. You take the small rtl codes for the sub modules and want to make a larger module consisting of the sub modules. Hoping it clarifies. Please let us know if more clarifications are necessary.

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omg yes, please, insult people who actually could known what you can't even ask about coherently. You are super smart ++ (!!!). idk why you even ask for info from us plebs.

In all honesty, you have no clue. There are books and manufacturer info on this easily available for free or for little cost. With little effort you could either answer your question, or formulate a better one.

It is sad you have no concept that your question is actually confusing to people who actually have experience in this field because you don't actually know anything about it.

edit -- (Sometime I post negative messages. This is nothing against you as a person. Just a plea that you at least try to learn something before asking bad questions. also i don't want email reminders...)

The question which was posed in post no 1 was asked to some of the engineers in our country and a few of the engineers in another country. All these engineers work in the same relevant field of ASIC to understand this question. They did not find any difficulties to understand the question at all. They understood the question within a minute without any doubt asked.

We do not understand what the problem can be, that you may be stating, even you working in the relevant field to answer the question, you are not understanding the question.

**** This is nothing also against you as a person(s).

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Well this is a post from sun_ray, so when I saw it on last Friday afternoon I choose to ignore it.
sun_ray, you have sent me a personal message. I give you the reply here. The answers of others in this thread is an indirect answer of me to your PM.

Please read the replies.

 

[TrickyDicky]

This is for integration of rtls for a bigger design. You take the small rtl codes for the sub modules and want to make a larger module consisting of the sub modules. Hoping it clarifies. Please let us know if more clarifications are necessary.

This is just instantiation of modules; a standard part of any design in HDL and will be covered in any HDL turorial or text book.

 

[sun_ray]

This is just instantiation of modules; a standard part of any design in HDL and will be covered in any HDL turorial or text book.

Instantiation of modules is one of the parts of rtl integration but rtl integration have different other aspects to be taken care while integration.

Do you work in rtl integration for ASIC?

Sometimes guidelines are avaible for rtl integration

 

[TrickyDicky]

Yes I do - what are you talking about?
RTL Generation?
Verification?
Synthesis?
Timing Analysis?
Floorplanning?

RTL Integration is a very general term.
You instatiate modules in your code. Then you test it and build it. If it doesnt work, you go back some steps and try again.

What are you on about?

 

[K-J]

The question which was posed in post no 1 was asked to some of the engineers in our country and a few of the engineers in another country. All these engineers work in the same relevant field of ASIC to understand this question. They did not find any difficulties to understand the question at all. They understood the question within a minute without any doubt asked.

Were you sleeping or otherwise just not paying attention when they answered the question? If you were paying attention, then why are you asking the same question to which you already have an answer?

 

[Tetik]

The question was clear. Anybody who works in relevant field to which the question belongs, will promptly understand.

Well, this question was addressed to ASIC engineers. This forum is for FPGA mainly. Seems you posted it in the wrong forum.

 

[dpaul]

Well, this question was addressed to ASIC engineers. This forum is for FPGA mainly. Seems you posted it in the wrong forum.

ASIC/FPGA is just the target implementation. All design engineers perform RTL integration in some form. So in my opinion this Q is valid in both forums.

Well Tetik, the problem is with sun_ray's posts. This Q is put in an FPGA forum, but as I can gather from #9 sun_ray was expecting an ASIC design engineer to answer his Q. This is either like ignoring forum posting rules or the member being completely unaware of what his question really means.

I have been following the OP for about 6 weeks now and hence was my comment on #8.

 

[ads-ee]

Don't you guys get it your training an AI! Haven't any of you noticed it's getting a little bit better each time it starts posting again after a short period of being quite (I'm sure the researchers are tuning the algorithms during the down times). ;-)

 

[K-J]

Haven't any of you noticed it's getting a little bit better each time it starts posting again after a short period

I know I haven't noticed any increase in the question quality. Sunray does get a lot of responses though...mostly along the lines of 'What are you talking about?'

 

[ads-ee]

I know I haven't noticed any increase in the question quality. Sunray does get a lot of responses though...mostly along the lines of 'What are you talking about?'

I get the impression the failure is in the translation between the foreign language and English. The term "RTL integration" in English is vague, but in the original language it has likely a very specific meaning, therefore those local "engineers" knew immediately what was meant by the terminology. Unfortunately English doesn't have such clear cut terminology in many cases (which is probably why it's used internationally, so you can say one thing and mean something else ;-)).

Another indication of this being a Turing test is the fact that they asked the question locally first. By asking first in the native language then trying the same question in a foreign language they can compare the results for analysis.

 

[vGoodtimes]

Ok, so I did look at this. There are actually "RTL integration engineer" jobs, so there is at least some informal definition out there. Companies also use the term in literature. I wasn't able to find a strict definition, which makes it hard to find a close match. There is probably a working definition out there somewhere.

There is a book called "Reuse Methadology Manual: For System-on-a-Chip Designs" that might be related. However, it might not be relevant anymore. The book assumes no global optimizations, which changes some design aspects. It covers design concerns when constructing a large, reusable block of RTL that needs to work with multiple tools/platforms. My guess is that you are looking for a condensed version of that book, possibly updated or modified by various companies.

The book preview is: https://books.google.com/books?id=LrHbBwAAQBAJ&printsec=frontcover#v=onepage&q&f=false

 

[sun_ray]

Yes I do - what are you talking about?
RTL Generation?
Verification?
Synthesis?
Timing Analysis?
Floorplanning?

RTL Integration is a very general term.
You instatiate modules in your code. Then you test it and build it. If it doesnt work, you go back some steps and try again.

What are you on about?

RTL integration can be for RTL integraion of IPs, RTL integration for SOC.

RTL integration does not mean the below

Verification,
Synthesis,
Timing Analysis,
Floorplanning.

RTL Integration may be a part of RTL generation that you are talking of.

Regards

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ASIC/FPGA is just the target implementation. All design engineers perform RTL integration in some form. So in my opinion this Q is valid in both forums.

You are correct.

Can we post this thread also in ASIC forum if anybody can answer there?

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Were you sleeping or otherwise just not paying attention when they answered the question? If you were paying attention, then why are you asking the same question to which you already have an answer?

They understood the question to whom it was shown, but they have not the answer of our question. Understanding a question and answering a question are two different things as you know.

Regards