ROUTING CONSTRAINTS ON A .80MM PITCH, 548 PIN BGA

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FCL223

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CAN ANYONE RECOMMEND PAD SIZE, ROUTE WIDTH AND SPACING?[/b]
 

What device is is and what package will you use for layout ?

:R
 

in general a 0.8mm with would be best with
land pad : 0.3
via : 20/10 or smaller.
clearance/pad: 5/5 or smaller

these is what i use for 0.8 mm pitch for bga. but u might wanna consider that urs is with 548 pins. perhaps u can use vias (20/10) for gnd n power
and for fan out smaller traces n vias.

y not u share what type of chip is this use for?
its very interesting to know 548 pins or more is being use

Taring
 

This chip is the TMS320DM640GDK Digital Signal Processor from Texas Instruments. I am currently using a .016 mil pad, a .016/.008 escape via, and a .006 mil trace.
 

Have you dowloaded the footprint from TI site and compared to calculated values.

Have you looked at the land pattern calculator available from pcblibraries.com?
 

I HAVE ALREADY DOWNLOADED THE FOOTPRINT. IT'S EXACTLY THE SAME AS THE ONE I CREATED. I'LL TRY THE CALCULATOR TODAY.
I DID FINALLY GET IN TOUCH WITH THE COMPANY THAT DID THE DEMO BOARD FOR TEXAS INSTRUMENTS. THEY RECOMMEND A PAD SIZE OF .017, VIA PADS OF .016/.008, TRACE/SPACE OF .005/.005. PRETTY CLOSE TO WHAT I AM ALREADY USING. JUST SEEMS TIGHT TO ME.
 

This can help you.
 

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