Dec 29, 2022 #1 B Basit Mehmood Newbie Joined Dec 6, 2022 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 16 I wanted to ask that how RISC-V deal with arithmetic overflow? As there is no flag register in risc-v. I have seen all CSRs in RISC V but they are machine, supervisor and user level. how i add register or mechanism for arithmetic overflow?
I wanted to ask that how RISC-V deal with arithmetic overflow? As there is no flag register in risc-v. I have seen all CSRs in RISC V but they are machine, supervisor and user level. how i add register or mechanism for arithmetic overflow?