ring structure in TSMC 40 nm process

[PLiu@amlogic]

Hi there,

I am new to TSMC 40 nm process and I am just wondering what will a cell ring structure like. I have been working in TSMC 180 nm process before and I know a cell ring structure in TSMC 180 nm process is like below:

1. GSUB(P-ring) to surround the whole cell layout

2. DNW/NWELL (N-ring connected to DVSS ) to surround a half of the digital part of cell layout

3. DNW/NWELL (N-ring connected to AVSS) to surround a half of the analog part of cell layout

But I am unable to find the DNW/NWELL (N-ring) in TSMC 40 nm multipart selection list.

Thanks very much for your attention & time!