What I meant was, you would like the timing element (C)
to not be a junction cap (C-V and temperature variability)
or MOS cap (C-V, and maybe a little tempco). A simple
ring oscillator often is only self-loaded stages and that
loading (C) is mostly junction, D-B. Not to mention that
the charging current is way variable in itself.
You'd like the majority of the timing capacitance to be
invariant (or else, make the timing current cancel that
variability, which would be more of an exercise). So, a
large-ish (if you are not up against technology speed)
invariant capacitor removes one source of supply (and
make, and temp) variation (or at least sandbags the
variation-contribution of the actives).
I can't see the details of voltage controlled delay stage
in that presentation, to say whether it is or isn't like
what I describe. I believe all of the documentation of
my designs remains the property of a former employer.