# ring oscillator problem

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#### fanshuo

##### Full Member level 5 ring oscillator + spice simulation setup

hi

I built a linear model of ring oscillator in LT spice,as shown in the figure
I set the initial condition to be 1V
and I found the output to be oscillated with amplitude of 3.5V
if I double the initial condition to be 2V
then the corresponding output amplitude is changed to 7 V

Is there anybody can explain why the amplitude is 3.5V to me?

Thanks

#### amarnath what is the supply voltage. the oscillator should oscillate from vdd to vdd-ir, where r is the resistance of the load of the delay element.i is the current when full switching occurs .

amarnath

#### lijianheng

##### Full Member level 2 #### fanshuo

##### Full Member level 5 amarnath said:
what is the supply voltage. the oscillator should oscillate from vdd to vdd-ir, where r is the resistance of the load of the delay element.i is the current when full switching occurs .

amarnath

This is just a linear model of ring oscillator
It will never saturate

#### jfyan

##### Full Member level 2 fanshuo said:
hi

I built a linear model of ring oscillator in LT spice,as shown in the figure
I set the initial condition to be 1V
and I found the output to be oscillated with amplitude of 3.5V
if I double the initial condition to be 2V
then the corresponding output amplitude is changed to 7 V

Is there anybody can explain why the amplitude is 3.5V to me?

Thanks

hi
i think you can calculte the amplitude of the oscillation by energy conservation roughly.
jeff

• angelwin

### angelwin

Points: 2

#### fanshuo

##### Full Member level 5 jfyan said:
hi
i think you can calculte the amplitude of the oscillation by energy conservation roughly.
jeff

I tried
but not sucessful

#### jfyan

##### Full Member level 2 fanshuo said:
amarnath said:
what is the supply voltage. the oscillator should oscillate from vdd to vdd-ir, where r is the resistance of the load of the delay element.i is the current when full switching occurs .

amarnath

This is just a linear model of ring oscillator
It will never saturate

besides, i think, the oscillator you bulit can not keep in its stable oscillation, because it is linear model. as i know, only non-linearity can limit the oscillation
amplitude. so if the oscilation set up stablly, non-linearity must exist in your system. correct me if above is wrong.
jeff

#### fanshuo

##### Full Member level 5 jfyan said:
fanshuo said:
amarnath said:
what is the supply voltage. the oscillator should oscillate from vdd to vdd-ir, where r is the resistance of the load of the delay element.i is the current when full switching occurs .

amarnath

This is just a linear model of ring oscillator
It will never saturate

besides, i think, the oscillator you bulit can not keep in its stable oscillation, because it is linear model. as i know, only non-linearity can limit the oscillation
amplitude. so if the oscilation set up stablly, non-linearity must exist in your system. correct me if above is wrong.
jeff

Yes, in normal ring oscillator it should start with a transfer gain>1
in my case it is set to be exact 1
so no saturation will happen
and it is also stable

the stable oscillation amplitude should determined by the initial condition
but I have not figure out how exactly it is

regards,

#### qqic

##### Member level 2 linear model is not accurate, run tran simulation

#### jfyan

##### Full Member level 2 fanshuo said:
jfyan said:
fanshuo said:
amarnath said:
what is the supply voltage. the oscillator should oscillate from vdd to vdd-ir, where r is the resistance of the load of the delay element.i is the current when full switching occurs .

amarnath

This is just a linear model of ring oscillator
It will never saturate

besides, i think, the oscillator you bulit can not keep in its stable oscillation, because it is linear model. as i know, only non-linearity can limit the oscillation
amplitude. so if the oscilation set up stablly, non-linearity must exist in your system. correct me if above is wrong.
jeff

Yes, in normal ring oscillator it should start with a transfer gain>1
in my case it is set to be exact 1
so no saturation will happen
and it is also stable

the stable oscillation amplitude should determined by the initial condition
but I have not figure out how exactly it is

regards,

hi

yes, i now understand your question.
it is a critical ponit when you set the gain of each stage is 2.
actually, we can set up three equations to solve this network in s-domain, right?
and then convert the v1(s),v2(s),v3(s) into time domain with initial state, remember, v1(0)=1,v2(0)=-2, and v3(0)=4.
i think, the spice simulation just did the same thing.

jeff

##### Full Member level 3 and I found the output to be oscillated with amplitude of 3.5V
if I double the initial condition to be 2V
then the corresponding output amplitude is changed to 7 V

Is there anybody can explain why the amplitude is 3.5V to me?

In every oscillator should be non linearity to determine the amplitude of the oscillation. Otherwise, it depends on the initial conditions. Therefore you may need to add a limiter to your linear circuit or there is another way:

You can use ALC : Automatic Level Controller.
In this manner you will have another feedback to determine the amplitude of oscillation.

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