RHEL AS4 +IC5141USR1+Assura313

[wildgoat]

even matched layout and schematic (such as simple invertor) cannot pass the LVS check

it shows that parameters mismatch(pmos and nmos)
i am sure it is a software bug, but i cannot solve it
who can help me ?

 

[tsinghua]

First, update the software.
ICUSR3
Assura315
Then try again.
If the problem still exists, check your rule file.

 

[wildgoat]

First, update the software.
ICUSR3
Assura315
Then try again.
If the problem still exists, check your rule file.

thanks for your suggestion!
but i successed in Solaris workstation ,all cadence version same(one for linux ,another for solaris)

the following is the error report in RHEL AS 4:
*******************************************************************************
****** invertor schematic test018 <vs> invertor layout test018
*******************************************************************************

Filter Statistics
================= Original Filtered
Cell/Device schematic layout schematic layout
(nmos2v, N) MOS 1 1 1 1
(pmos2v, P) MOS 1 1 1 1

Reduce Statistics
================= Filtered Reduced
Cell/Device schematic layout schematic layout
(nmos2v, N) MOS 1 1 1 1
(pmos2v, P) MOS 1 1 1 1

Match Statistics
================ Total Unmatched
Cell/Device schematic layout schematic layout
(nmos2v, N) MOS 1 1 0 0
(pmos2v, P) MOS 1 1 0 0
------ ------ ------ ------
Total 2 2 0 0

Match Statistics for Nets 4 4 0 0

=====================================================================[invertor]
====== Parameter Mismatches for Instances =====================================
===============================================================================

= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (param 1)
Schematic Instance: NM0 nmos2v
Layout Instance: avD676_1 N

w 2e-06 vs 2e-06 differs by 2.52476e-07%
l 1.8e-07 vs 1.8e-07 differs by 3.79118e-07%

= = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (param 2)
Schematic Instance: M1 pmos2v
Layout Instance: avD733_1 P

w 4e-06 vs 4e-06 differs by 2.52476e-07%
l 1.8e-07 vs 1.8e-07 differs by 3.79118e-07%

=====================================================================[invertor]
====== Summary of Errors ======================================================
===============================================================================

Schematic Layout Error Type
--------- ------ ----------
2 2 Parameter Mismatches for Instances


it seems that parameters are extracted correctly,but still judge them different?

 

[tsinghua]

It seems that the tolerance values are set to zero in your rules file.
Check the compare.rul file.
You should find a section related to tolerance settings.
The following is the excerpt from the compare.rul I am using.
------------------------------------------------------------------------
; *********************************************************************
; Module 1. Put tolerance values up front so they are easy to change
; *********************************************************************

; these are percentages

; MOS width, length

mosW_lvsTol = 1.00
mosL_lvsTol = 1.00

; RES w, r

resR_lvsTol = 1.00

; BJT area

bjtAREA_lvsTol = 1.00

; DIODE area

diodeAREA_lvsTol = 1.00

; CAP area

capC_lvsTol = 1.00

; MOSCAP w, l

moscapW_lvsTol = 1.00
moscapL_lvsTol = 1.00
moscapA_lvsTol = 1.00

; MIMCAP c

mimcapC_lvsTol = 1.00

; Inductor r n

ind_lvsTol = 10

; RF varactor mos

rfvmosWR_lvsTol = 1

rfvmosLR_lvsTol = 1

rfvmosNF_lvsTol = 1

; RF varactor diode

jvAREA_lvsTol = 1
jvNF_lvsTol = 1

; RF MIM wr lr area

rfmimWR_lvsTol = 1
rfmimLR_lvsTol = 1
rfmimAREA_lvsTol = 1

; RF MOS varactor wr lr nf

rfmosWR_lvsTol = 1

rfmosLR_lvsTol = 1

rfmosNF_lvsTol = 1
---------------------------------------------------------------------------------
Hope this help you.
BTW, I have used IC5141USR3+Assura315 without any trouble on RHEL AS4U3.