RF high power TR Q cap gate _ two gate loadpull _ current_Length

[Dummyeng]

Hi
i design an amp with MRF13750 i put them in parallel (Balance arch)
so
1- i used BLC and i dont put any cap between gates but i have seen in famous company design like EmPower they put some caps between two drains and some caps between two gates specially put trimmer cap between two gates. should i consider this kind of capacitor? or i should follow my design?

2- in load pull and impedance matching i design only for one gate then copy it for another gate is it correct?

3- in datasheet they said that it can only give us 700W but in simulation i could get more than 1KW with almost 45% efficiency so about drain current in simulation show it wants almost 55A is it correct?it is only for one tr and when i parallel them i can get more than 62dBm

4- my board length is more than 60cm (for two) should i use tandem to decrease my size?(any other suggestion)

 

[vfone]

The measured power from the transistor datasheet shows maximum 800W at 915MHz and max. 700W at 1300MHz.
Tuned caps between gates and between drains is for narrow band applications. Those caps may increase the power and efficiency performances, but also stability may be affected. Is not very easy to keep under control a 22dB gain, 800W transistor.

The design showed in the link below don't use any caps between gates or between drains, but use a resistor between gates, most probably to prevent oscillations.

https://www.w6pql.com/1296/images/13750amp/rf-deck.jpg