I am new to VLSI design i want to do one real time project. if i take one ieee project what are the steps i need to follow to write code in verilog.
Can please any one suggest me.
1. Micro Architectural Review(FLOW Diagram Level) from all aspects like Timing Area Power.
2. Once above is approved RTL coding starts
3. All Frontend Checks
4. Constraints
5. Synthesis
6. Deliverable to Physical Design