Reporting critical path in Synopsys Primetime

[souvikedaboard]

Hi all,
So I have a combinational ckt(Benchmark c432 ckt to be precise) and I want to find out its critical path using Synopsys Primetime, because it is a combinational circuit it does not have a clock so after reading the design I used the create_clock command in primetime to set up a virtual clock(not sure if it is the right step). After that I am trying to find out the critical path by using the command:
report_timing -from[all_inputs] -to[all_outputs] -max_paths 1

But the report that is getting generated is giving me "no constrained paths".
Can anyone help me with the problem please?

Thanks

 

[sharath666]

If it is a purely combinational circuit, it does not make any sense reporting a critical path as first of all there are no valid paths in this design. A path is defined as the route traced from the launch flop to the capture flop both of which are not present in this design.

 

[Ashish Agrawal]

Hi,
To constrain a feed through path (pure combo) use set_max_delay.
command:
set_max_delay delay_value [-from from_list] [-to to_list]