Ninochip
Newbie level 4
Hi all,
I'm programming a Renesas R8C/25 with IAR compiler. The uC is done with 2 banks registers. Each bank is selectable through a B flag. Although compiling with high optimization, debugging my code I notice bank 1 is never used. Someone said me it should be possible to tell the compiler to use bank 1 as a RAM stack during interrupt services, let's say to switch bank during an interrupt call to use bank 1 registers and to switch again to bank 0 at the end, avoiding pops from stacks and increasing performance.
Has anyone a suggest or faced this problem?
Thx,
Nino
I'm programming a Renesas R8C/25 with IAR compiler. The uC is done with 2 banks registers. Each bank is selectable through a B flag. Although compiling with high optimization, debugging my code I notice bank 1 is never used. Someone said me it should be possible to tell the compiler to use bank 1 as a RAM stack during interrupt services, let's say to switch bank during an interrupt call to use bank 1 registers and to switch again to bank 0 at the end, avoiding pops from stacks and increasing performance.
Has anyone a suggest or faced this problem?
Thx,
Nino
