buenos
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Do you guys rely on post layout si simulations to validate designs?
Specifically for 10gig serial links.
I have seen 2 approaches:
One is the si team does nothing else but extracting board files and compare eye diagrams against eye mask.
The other one is only do si what if analysis at early stage to help making strategic decisions like constraint values, antipad sizes...
I think the post-layout analysis is overly optimistic, it will say the design is sound, and then it might fail on the prototype. Because it does not consider all the disturbances on a board, like the transmission line is floating in empty space.
It might validate something, other than the design.
Specifically for 10gig serial links.
I have seen 2 approaches:
One is the si team does nothing else but extracting board files and compare eye diagrams against eye mask.
The other one is only do si what if analysis at early stage to help making strategic decisions like constraint values, antipad sizes...
I think the post-layout analysis is overly optimistic, it will say the design is sound, and then it might fail on the prototype. Because it does not consider all the disturbances on a board, like the transmission line is floating in empty space.
It might validate something, other than the design.