I need to design NCO( Numerically controlled oscillator) by using look up tables.
I dont have any Idea how to store the data in LUT and access the same.
Currently I am working with DSP processor, I need to develope this using C.
A LUT for a processor or DSP is a constant array in RAM or ROM, intializied in your source code. As C compilers normally don't have an option to calculate tables at compile time, you have to use a script interpreter that can perform sine function or calculate the table offline (e. g. with a spreadsheet program) and insert the table into your code.
In VHDL FPGA prgramming, you would be able to initialize a sine ROM at compile time from a few lines of code.
Take a look at the following DDS (Direct Digital Synthesizer) tutorial by Analog Devices.
It explains clearly the general architecture of a DDS and it is a good starting point for your design.
You could also download the datasheets of DDC (Digital Down Converter) chips (e.g AD6624, AD6636 by Analog Devices) and examine the NCO sections, but I think that this should not add anything new.
For NCO, the input is the frequency (often named as tuning word) - let's say w. Then the phase accumulator will integrate the frequency and get the phasee (phase = w*t). Finally there is a LUT to map the phase to amplitude (phase -> sin and cos). That's all
For NCO, the input is the frequency (often named as tuning word) - let's say w. Then the phase accumulator will integrate the frequency and get the phasee (phase = w*t). Finally there is a LUT to map the phase to amplitude (phase -> sin and cos). That's all
take a look at the tutorial I posted last time: you do not have to read all the pages. I suggest you to read at least chapter 2, 3 and 4 which clearly explain (in my opinion) the basic concepts of digital frequency synthesis necessary also to design a SW NCO in a DSP processor: the theory is the same for HW and SW implementations, the main difference is that instead of an external clock (the tutorial was aimed to HW designer) you have a timing which is given by the sample rate used to perform phase increments and access to the LUT array. Obviously with a sw NCO implemented on a DSP you could generate very low frequency values (e.g. < few MHz if you use a fast DSP) compared to those generated by a dedicated HW, like the DDS chips described in the tutorial.
Take a look at the following DDS (Direct Digital Synthesizer) tutorial by Analog Devices.
It explains clearly the general architecture of a DDS and it is a good starting point for your design.
You could also download the datasheets of DDC (Digital Down Converter) chips (e.g AD6624, AD6636 by Analog Devices) and examine the NCO sections, but I think that this should not add anything new.