santuvlsi
Member level 4
Hai friends,
Thanks for giving best replies,
Let me get cleared in one more confusion
Writing HDL will generate clock fine, this in front end.
Clock gets generated.
Coming to backend how this generated clock comes into picture?
After synthesis we get a netlist . do this netlist includes the hardware of clock?
Then we design a IC where clock has to be given as input, normally oscillator are used.(We say for a microprocessor connect 32.5Mhz clock to the clock input PINs)
Now what is use of the clock we generated using HDL and what is the use of Oscillator clock.
I am unbale to understand the difference
Santu
Thanks for giving best replies,
Let me get cleared in one more confusion
Writing HDL will generate clock fine, this in front end.
Clock gets generated.
Coming to backend how this generated clock comes into picture?
After synthesis we get a netlist . do this netlist includes the hardware of clock?
Then we design a IC where clock has to be given as input, normally oscillator are used.(We say for a microprocessor connect 32.5Mhz clock to the clock input PINs)
Now what is use of the clock we generated using HDL and what is the use of Oscillator clock.
I am unbale to understand the difference
Santu