Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Reflection at Inverter-Stage

Status
Not open for further replies.

avt

Member level 5
Joined
Apr 25, 2005
Messages
86
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,981
Hi,

I have an LVDS output stage like the One in Bonis paper (aks if you need it) connected to an mtline model. Now I would like to simulate something like S22 in order to have a reflection over frequency plot for common-mode and/or differential signals by doing "pss" - possible to do that ? (how ?)
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top