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Referance Generation for flash ADC

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Member level 5
Aug 30, 2005
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I would like to know how can one generate referance voltage for ADC using BGR (bandgap ref ckt)? Do I need to use Ibgr or Vbgr ?
Also what needs tobe considered so that BGR loading is avoided? I mean what needs to be tested for the BGR block so that it will drive the referance generation circuitry?

thanks in advance ?

The following informations would help in understanding the promleb in more details....
1.What type r u using...MOS/BJT/BiCMOS....
2.Ref. voltages would be connected to MOS gate or BJT/HBT base....
3.What is the resolution of the reference voltahe...

In general, that much I know is, people go for resistor ladder network to generate reference voltage for FLASH, if u can achieve a good matching between the resistors.....and throw a fixed current through would do the work.....but, in ADC as the spec. is highly bound by two independent is Input Swing and the other is u have to precisely control the reference voltage absolute value...not in ratio...thus if u throw current....the abolute value of the layed out resistor mulipled by the BGR current...need to be 'absolutely' matched with the ADC input swing and resolution....

Instead if u use a voltage bgr, then the upper level of the reference is fixed and if u just devide it to the required level with the would be better..
In the second case....the configuration would be sensitive only to relative mismatch of the resistors...not the absolute value.....

This is a general talk...if u need more details plz be free to discuss...


thanks sankudey,

I am working on CMOS devices only using smic 0.18um technology. The input Swing of ADC is 1.5V to 2.4V and resolution (1 LSB) is 28.14mV...since this is a 5 bit ADC.

So, I would need to generate 2.4 V Vref for the resistance ladder network whch generates 31 required ref. voltage steps.

details targeted specs are as below

Parameter Nominal Value Units
Resolution 28.125 mV / LSB
Accuracy +/- 1 LSB
Speed 10 SPS
DNL +/- 0.5 LSB
INL +/- 0.5 LSB
Input range 1.5 – 2.4 V
SNR 31.76 dB
Supply 3.3 V
Vref 2.4 V
Current Consumption 2 uA
Temperature Range -40 to 80 deg C

As u r working with intermediate current tapping will be there from the resistor the input goes to MOS u can try with BGR in voltage just verify the idea....u can employ first an ideal voltage source from the simulator....then can try with some controlled voltage source with most likely to bgr....then can go for designing the bgr...

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