entity GENMUX is
generic ( M : integer := 4;
N : integer := 32
);
port ( Input : in std_logic_vector(M*N-1 downto 0);
Sel : in std_logic_vector(LOG2(M)-1 downto 0);
Output : out std_logic_vector(N-1 downto 0)
);
end GENMUX;
architecture flot of GENMUX is
subtype mot is std_logic_vector(N-1 downto 0);
type t_mot is array(0 to M-1) of mot;
signal tmp : t_mot;
begin
tmp(0) <= Input(N-1 downto 0);
MUX_chain : for i in 1 to M-1 generate
tmp(i) <= Input((i+1)*N-1 downto i*N) when (conv_integer(Sel) = i) else tmp(i-1);
end generate MUX_chain;
Output <= tmp(M-1);
end flot;