Real to decimal number conversion in VHDL

[raghava216]

I have some real numbers like 9.123472e+002.
I need to print these to a file after converting them to normal decimal number representation from scientific representation like in this example I want to write 912.3472 to the file instead of writing 9.123472e+002.

Any idea how to do this in VHDL? Any library functions to do this job?

 

[FvM]

Are you talking about testbench design or synthesizable VHDL? Print to a file sounds like testbench output.

 

[raghava216]

ya.. its part of a test bench

 

[rca]

Where comes from your 9.123472e+002 number?

that's data for or from the test-bench?

 

[FvM]

ieee.textio.write() does what you want.

 

[raghava216]

@rca
These numbers are generated by the testbench.

@FvM
passing that real number as an argument to IEEE TEXTIO package write() prints the number in scientific notation, which is not what I want to see.
would u mind to post the exact VHDL code?

 

[FvM]

According to the VHLD LRM write() has format parameters.