anindya
Newbie level 4
i am trying to interface ad7854ars with a spartan 3 fpga using a state machine approach. i have 2 questions
1) can multiple states drive the same pin of the fpga, if it can be done how. till now what i have done is resetting the concerned signal driving the pin to low before exiting the state so that in the next state another signal can drive the same pin.
2) the data from the adc is getting dumped into a 16*2 ram in one particular state. in the next state if i want to access the data in the ram how do i drive the address lines as its latched to the last state output . i thought about resetting the output of each state before exiting that state.
thanks in advance
1) can multiple states drive the same pin of the fpga, if it can be done how. till now what i have done is resetting the concerned signal driving the pin to low before exiting the state so that in the next state another signal can drive the same pin.
2) the data from the adc is getting dumped into a 16*2 ram in one particular state. in the next state if i want to access the data in the ram how do i drive the address lines as its latched to the last state output . i thought about resetting the output of each state before exiting that state.
thanks in advance