I want to write some Verilog/VHDL code for image processing. Can any image file (e.g. JPEG) be the input of Verilog(/VHDL) source code, and after processing the image, the output image be stored as image file (In hardDisk)? The board i used will be SPARTAN II xc2s50.
I think verilog has not this ability. you should convert image to matrix anywhere (MATLAB) and use its file as input for verilog (in Modelsim) with 'readmem". after compilation you can save the results with "$fprint" and convert this file (with MATLAB) to image.