read delay and write delay in SRAM cell

Status
Not open for further replies.
E

electronics20

Full Member level 1
Joined
Apr 27, 2011
Messages
99
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Activity points
1,888
Dear
I want to measure the read delay and write delay of an SRAM cell 6T in HSPICE, Would you please help me to do this?
Many Thanks in advance
 

Which SRAM architecture? Clocked or self-timed? Also, see here!
 

In my opinion and limited experience, the intracell "delay" is
of almost no value / consequence; the precharge and sense
phases dominate read time, I expect the write driver delay
(with its large chip-scale loading) dwarfs the cell internal
delay and so on.

Now this request is likely academic (homework) so perhaps
practicality doesn't enter into it.
 
Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…