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RE:reduction of power in a bist

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prakaash3442

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hi
I am Prakaash pursuing my M.Tech and i took up a project regarding power reduction in bist

i know the concept and studied paper but its a basic problem is that i am not getting idea how to implement it

there r 2 methods to reduce power out of which
1)using bit swapping LFSR and
2)cell re ordering
so i have done my first part and i want this second part.I mean i need suggestions to how to proceed for cell re ordering and its algorithm on any circuit.

and i vil be happy if some one can provide me any of the bench mark circuit diagram as i did it for S27 ISCAS'89 bench mark circuit.
can any one kindly suggest me some web sites regarding this issues also be accepted

PRAKAASH
 

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