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questions about post-simulation, continued

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lhlbluesky

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i use calibre PEX for layout post-simulation, i have some questions as follows:

1, in PEX options, there is an option 'corner extraction', what is the role of this option? if i choose this option, what is the difference between choosing it or not?

2, besides,i set the parasitic capacitor and resistor type to cap and res in analoglib (file calibre.cellmap), then, the value of parasitic capacitor and resistor of the layout remains the same in all corners (tt, ss, ff, fs, sf), but i think the parasitic capacitor and resistor will differ in different corners, am i right? if so, how to make the parasitic cap and res change with corner? if not, why? pls explain to me.

3, for my ciruit and layout, i find that, for different signal amplitude, the switch noise id different also, for ex: when signal amplitude is 1.5V, the switch noise (clock feedthrough and charge injection) is about 2mV, but when siganl amplitude increases to 2V, switch noise increases to 4mV, that is, the switch noise (signal sudden chage when switches on and off) changes with signal amplitude; besides, for different corners, the switch noise differ, too. why? has anyonr meet this problem ever before? and how to solve it, pls?

pls help me about the above questions, thanks all for reply. thanks.
 

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