question of Vth dependence on L

[analogic]

it is often said in some books, e.g. Razavi's book, Vth increases when L increases (NMOS). But from the experiences with tsmc0.18 CMOS process, I find Vth decreases when L is increased from 0.2um to 1um. Can any one tell me why? Thanks.

 

[flushrat]

y, I find the same phenomena. For l=0.18u, vth=0.516, l=0.2u, vth=0.511

 

[ambreesh]

What you are observing is due to DIBL (Drain induced barrier lowering).
This is majorly observred at small lengths.
Their are other phenomenas also.

 

[nEuron]

ambreesh, you are right!.
analogic & flushrat, you both can refer to a book called "Operation and Modeling of the Mos Transistor
" by Yannis Tsividis for more information.