May 30, 2015 #1 V vadim888 Member level 2 Joined Feb 4, 2013 Messages 46 Helped 5 Reputation 10 Reaction score 5 Trophy points 1,288 Activity points 1,596 Dear all, I just want to understand, how to find CL? Because for sizing CMOS inverter you always need to know load capacitance, but in real layout or schematic you don't have any capacitance instance. I have one idea, maybe it's a parasitics capacitance, but how I can find it, from PDK? Regards, Vadim
Dear all, I just want to understand, how to find CL? Because for sizing CMOS inverter you always need to know load capacitance, but in real layout or schematic you don't have any capacitance instance. I have one idea, maybe it's a parasitics capacitance, but how I can find it, from PDK? Regards, Vadim
May 30, 2015 #2 erikl Super Moderator Staff member Joined Sep 9, 2008 Messages 8,108 Helped 2,695 Reputation 5,370 Reaction score 2,305 Trophy points 1,393 Location Germany Activity points 44,123 It's the sum of output capacitance of the inverter, the routing parasitics, and the input capacitance of the following stage or cell to be driven.
It's the sum of output capacitance of the inverter, the routing parasitics, and the input capacitance of the following stage or cell to be driven.