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Question about verilog syntax

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adgjl40112

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Question about verilog

Hi friends, I want to ask a question about verilog syntax;
I want to have a function for verilog which works like in c codes as following
int a = 1;
int b[10];
if (b[a] == 1) // what I want is use variable index

I don't know how can I fulfill this functionality.
Another question is when writing FSM.

If I have some if else statement, normally where should I place? In combinational part or sequential part. thx a lot
 

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