Question about VBG spread

[jcpu]

I have 3 bandgap out of 0.25um CMOS logic process.
All 3 are opamp type, with slightly different topology.
The simulation or measurement of temperature curves are all correct.

The question is that, their VBG die to die variation are very different.
two with +/- 100mV, the other +/- 40mV.
And I am seeing people posting +/- a few mV result.
Look like I do need some help.

I have trouble finding literature discussing this.
Please give some advice.

 

[plasma2000]

HELP: VBG spread

I have done one +/- 10mV

For good PSRR and Temp independant, cascode CM or AOP structures are nessary.

Now I have to redo the design, because the LIB has been updated, merde!

 

[jcpu]

Re: HELP: VBG spread

Dear plasma2000:

Thanks much for your information.
May I know the most imprtant question:

Based upon 50 pcs or more (the more the better),
what is the VBG output variation looks like? (before triming)

Thanks in advance.