Question about transistor sizing

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ahmed709

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i am making a design for charge pump and i want to know the maximum transistor length i can use and the corresponding maximum width.

Note: i use (0.13u technology)

thanks in advance
 

There is no exact limit for that. Sometimes, in the model file, there is limited transitor size for accurate spice model. You can check your model file
 

The limited transistor model file is (20u M), but i feel that it is not a practical value,
have you any other suggestion please???
 

are you sure the maximum is 20um? probably that is digital process. please consult you foundry wheter they have others suitable process for analog circuit.

-evilguy-
 

I want to increase the output resistance of the transistor (lambda = 0) so i need to increase the length as much as i can, i.e. can i use L=5.2u M???

the another question is: Is there another method to increase the output resistance???
thanks in advance
 

maybe you can increase Vgd or Vt
 


You may use cascode.
 

I tried to use cascode but i couldn't make it, can u tell me the true way, please
 


I think there's no problem in using L=5.2um

To increase the output resistance u can decrease the current, however i don't know if this is applicable in ur case
 

ahmed709 said:
The limited transistor model file is (20u M), but i feel that it is not a practical value,
have you any other suggestion please???

Have you checked the model file? Or you just tried to increase the value when quiring transistor properties?

In general, using cascode will enhance output resistance, gain, but will limit output swing!

What is your frequency of operation, and current budget you are allowed to spend?

Regards,
Ahmad
 

ahmed709 said:
I tried to use cascode but i couldn't make it, can u tell me the true way, please

I feel cascode is the way to go... By sizing the transistors properly you should be able to get the required resistance...

5u length should also be fine as long as you are not expecting a high gm from that transistor..
 

Using one of the attached architectures will help u to obtain good swing at the output node although and you'll need to use small W's and L's for switching transistors.

Attached in also is the paper from which i captured these two configurations, I recommend that you read the whole paper, it's really useful.

For me, i recommend the second configuration (figure b), due to its low complexity, although it have some draw-backs which tried to be solved in figure a, i don't recommend figure a. Read details about them in the paper.

I hope that will help
Ahmad,
 

    ahmed709

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