For PLL, the Vctrl of the VCO will rise from 0V. Does the Vctrl of Voltage controlled delay line rise from 0V too? Or it depends on the structure of the charge pump?
If the VCDL in DLL is single ended inverter-based delay line, and the VCO in PLL is also single ended inverter-based ring oscillator, what will the Vctrl behave for each case? Will it start from 0V? Or start from about half of the supply voltage?
Added after 3 minutes:
DZC said:
Did you mean the initial condition?
Generally I start simulation from 0V...
Yeah, I mean if start fimulation form 0s, what will Vctrl behave?
Will the simulation results be different when the other circuits (not in the DLL loop) are changed?