[SOLVED] question about spread spectrum with PLL

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lawfulgm

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Hi all

I have a question about spread spectrum and its use with PLL synthesizer

Let's say I have a clock source that is generating 100 MHz clock with 5000 ppm down spread with 33 kHz frequency modulation profile.
Thus, the minimum and maximum frequency from this source is 99.5 MHz and 100 MHz, respectively.

Then let's say I have a PLL frequency synthesizer that takes above clock as a reference clk, and this synthesizer is generating 1 GHz clock.
(in this case, then multiplication factor is 10)

Would it also multiply 99.5 MHz clock by 100 as well?

If so, then minimum frequency of this PLL synthesizer would be 995 MHz, and maximum frequency will be 100 MHz. wouldn't it generate such a large jitter at the end?

It may sound very dumb question, but I just wanted to understand how PLL synthesizer is working in conjunction with spread spectrum.

Thanks,
 

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