I want to simulate capacitor bank glitch. This is a 8bit binary cap bank. I can use AC or SP simulation find the total cap value vs. code. How can I run some transient simulation and find cap vs. time (code changes with time)? I want to see glitch size when code changes in real time.
I want to simulate capacitor bank glitch. This is a 8bit binary cap bank. I can use AC or SP simulation find the total cap value vs. code. How can I run some transient simulation and find cap vs. time (code changes with time)? I want to see glitch size when code changes in real time.
I did not quite understand why transient simulation should be a problem , you can create a clock source in spice , you can then either instantiate a counter model or construct a simple counter from FF's , You can then connect counter outputs to ideal switches / Mos switches as your wish . I do agree with the FvM that the context is not quite clear.