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Question about sigma delta ADC!!!!!!!!!!!!!

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blueseatears

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Hi, all
We've designed a 16bit Sigma delta ADC.
But the performance of the chip is not stable:
The SNR varies between 60dB and 90dB.

Do you encounter such matter?

plz help me!!!!!!
 

is it discrete time SD?
 

hey guys can any one tell me why a SC-CMFB becomes unstable and how to overcome this problem. I have designed a folded cascode OTA with SC_CMFB and its output in transient response is oscillation. help me please it's urgent. I am designing it for a sigma delta ADC Discrete Time.
Thanks in advance.
 

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