samster19
Newbie
I am designing a PLL wherein a current mode DAC plays the role of fine tuning the output frequency. This current is integrated onto a capacitor. The DAC receives its controls from a 6 bit MASH modulator which are demultiplexed to 64 and re-timed with the help of an FF to control each unit element. Each element either sinks current if the select bit is high or turns off if select is low.
I have a couple of questions. I understand the MASH moves quantization noise to higher frequencies, but how does it help the current DAC? Also, why would re-timing of these control signals be needed?
I have a couple of questions. I understand the MASH moves quantization noise to higher frequencies, but how does it help the current DAC? Also, why would re-timing of these control signals be needed?