Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

question about comparator

Status
Not open for further replies.

admiral_v

Newbie level 6
Joined
Feb 27, 2014
Messages
14
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
87
why in this comparator out voltage is between -vdd and +vdd While we expect 0-vdd Untitled - 2.jpg
 

The circuit does not have a positive supply called +vdd. Then its output cannot be a positive voltage.
Meaned to say "the circuit has only positive Vdd and can't have negative output"?

There may be some negative voltage peaks by capacitive crosstalk, bad hardly to full inverted Vdd level.
 

Before I posted I wrote that the circuit was missing a negative supply due to the arrows on the transistor "emitters". Then I realized the transistors are Mosfets and the arrows on Mosfets sources are in the opposite direction with the opposite polarity to emitters on transistors. So I corrected by saying the positive supply is missing.
 

out with 2 inverter in out- & out+ Untitled - 2.jpg
 

Apparently you don't understand the meaning of a differential voltage probe V(out+,out-1).
 

That is because you are testing differential output. When Vout+ = 2.5V and Vout- = 0V, your simulation result gives 2.5V and when Vout+ = 0V and Vout- = 2.5V, your simulation result gives -2.5V.

Xiahan
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top