Query Related to Slack in synthesis

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Daya123

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Hi.., Can any body tell me how to reduce negative slack in synthesis.? Please Suggest me what are the step i need to follow to make it to zero or positive slack.
 

Daya123 said:
Hi.., Can any body tell me how to reduce negative slack in synthesis.? Please Suggest me what are the step i need to follow to make it to zero or positive slack.
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1 - better design
2 - pipelining
3 - reduce clock frequency
4 - change synthesis targets to be more aggressive
5 - retiming
6 - above all, understand synthesis.
 

better design
pipline design
ungrouping
set weight
register retiming
incremental opt
All above depends on particular situation
 

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